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CompuLab Ltd. IPC2 – Hardware Specification Page 30 of 83

Table 18 – Supported Max Memory Size per SO-DIMM

3.6.3 System Memory Timing Support

The IMC supports the following Speed Bins, CAS Write Latency (CWL), and command signal mode

timings on the main memory interface:

 tCL = CAS Latency

 tRCD = Activate Command to READ or WRITE Command delay

 tRP = PRECHARGE Command Period

 CWL = CAS Write Latency

 Command Signal modes = 1N indicates a new command may be issued every clock and

2N indicates a new command may be issued every 2 clocks. Command launch mode

programming depends on the transfer rate and memory configuration.

Table 19 – DDR3L System Memory Timing Support

Note: Refer to DDR3L memories only

1 2 ... 25 26 27 28 29 30 31 32 33 34 35 ... 82 83

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